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authorJorge Hernandez <jh1730@att.com>2017-10-24 17:16:31 -0500
committerJorge Hernandez <jh1730@att.com>2017-10-24 17:16:31 -0500
commit7e3ace91847ec5aaccfeeff638a8d2d9b17e45fc (patch)
treef897ceb7ef39462a59e2551be82e4a58489d9c6c /controlloop/common/model-impl/so
parent1480d327ff8559c1d912108f7d3353fed03fcd2c (diff)
change drl line to avoid velocity bug
generating a control loop project from archetype (but not from junits) runs into velocity parse failures as specified in ticket. The existing .drl code for the line that fails the parsing has been slightly modified to bypass this problem. In addition a logging statement has been added to the catch. Change-Id: I3eec82c9b710cc9d2a13dc68032a8a6074016b40 Issue-ID: POLICY-376 Signed-off-by: Jorge Hernandez <jh1730@att.com>
Diffstat (limited to 'controlloop/common/model-impl/so')
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