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author | Dan Timoney <dtimoney@att.com> | 2021-11-11 09:27:27 -0500 |
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committer | KAPIL SINGAL <ks220y@att.com> | 2021-11-15 13:35:23 +0000 |
commit | 558d6d2de33bb8cf4b16df980a0cdf3b1747a8e2 (patch) | |
tree | 9a29c718a793fdc6b4eb6d4187e84848771c1af3 /csit | |
parent | cf498072469966eae4bbd9a3a810a3b7a65f98ae (diff) |
Use Silicon SR2 parent
Use Silicon SR2 parent pom
Issue-ID: CCSDK-3513
Signed-off-by: Dan Timoney <dtimoney@att.com>
Change-Id: Id0caa5d8a91eba27518a54305c0ff3908e100c14
Diffstat (limited to 'csit')
0 files changed, 0 insertions, 0 deletions